‫‪١٣٨٠/٩/١‬‬
‫اﻣﺘﺤﺎن ﻣﻴﺎن ﺗﺮم درس ﻣﻌﻤﺎری ﮐﺎﻣﭙﻴﻮﺗﺮ )‪(۴٠٣٢٣‬‬
‫ﻣﺪت ْﺁزﻣﻮن دو ﺳﺎﻋﺖ و ﻧﻴﻢ )‪ ١۵٠‬دﻗﻴﻘﻪ( ﻣﯽ ﺑﺎﺷﺪ‪.‬‬
‫ﺗﻌﺪاد ﺳﻮاﻻت ‪ ۵‬ﻋﺪد و در ‪ ۴‬ﺻﻔﺤﻪ ﻣﯽ ﺑﺎﺷﺪ‪.‬‬
‫ﻧﻤﺮﻩ هﺮ ﺳﻮال ﮐﻨﺎر ﺁن ﻧﻮﺷﺘﻪ ﺷﺪﻩ اﺳﺖ و ﻣﺠﻤﻮع ﻧﻤﺮات ‪ ٢١‬ﻣﯽ ﺑﺎﺷﺪ‪ ١) .‬ﻧﻤﺮﻩ اﺿﺎﻓﯽ(‬
‫)‪ ۱/۵‬ﻧﻤﺮﻩ( ‪ -۱‬ﺍﻋﺪﺍﺩ ‪ -36‬ﻭ ‪ -9‬ﺭﺍ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺍﻟﮕﻮﺭﻳﺘﻢ ‪ Booth‬ﺩﺭ ﻫﻢ ﺿﺮﺏ ﮐﻨﻴﺪ‪) .‬ﮐﻠﻴﻪ ﻣﺮﺍﺣﻞ ﺿﺮﺏ ﺭﺍ‬
‫ﻧﺸﺎﻥ ﺩﻫﻴﺪ‪(.‬‬
‫)‪ ۲/۵‬ﻧﻤﺮﻩ( ‪ -۲‬ﻣﯽ ﺧﻮﺍﻫﻴﻢ ﻳﮏ ‪ ١۶ ALU‬ﺑﻴﺘﯽ ﺑﺴﺎﺯﻳﻢ ﮐﻪ ﭼﻬﺎﺭ ﺳﻴﮕﻨﺎﻝ ﺣﺎﻟﺖ ‪ V, C, S, Z‬ﺭﺍ ﺩﺭ ﺧﺮﻭﺟﯽ‬
‫ﺧﻮﺩ ﺗﻮﻟﻴﺪ ﮐﻨﺪ‪ .‬ﺳﻴﮕﻨﺎﻝ ‪ Z‬ﻭﻗﺘﯽ ﻓﻌﺎﻝ ﺍﺳﺖ ﮐﻪ ﺧﺮﻭﺟﯽ ﺻﻔﺮ ﺑﺎﺷﺪ‪ .‬ﺳﻴﮕﻨﺎﻝ ‪ S‬ﻧﺸﺎﻥ ﺩﻫﻨﺪﻩ ﻋﻼﻣﺖ ﺧﺮﻭﺟﯽ‬
‫ﻣﯽ ﺑﺎﺷﺪ‪ .‬ﺳﻴﮕﻨﺎﻝ ‪ C‬ﺭﻗﻢ ﻧﻘﻠﯽ )‪ (Carry‬ﺧﺮﻭﺟﯽ ‪ ALU‬ﺍﺳﺖ‪ .‬ﻭ ﺳﻴﮕﻨﺎﻝ ‪ V‬ﻫﻤﺎﻥ ﺳﺮﺭﻳﺰ )‪ (Overflow‬ﺍﺳﺖ‪.‬‬
‫ﺍﻟﻒ‪ -‬ﺍﮔﺮ ﺩﻭ ﻭﺭﻭﺩﯼ ‪ ALU‬ﺭﺍ ‪ A, B‬ﻭ ﺧﺮﻭﺟﯽ ﺁﻧﺮﺍ ‪ S‬ﺑﻨﺎﻣﻴﻢ‪ ،‬ﻭ ‪ ALU‬ﻗﺮﺍﺭ ﺑﺎﺷﺪ ﺗﺎ ﻓﻘﻂ ﺍﻋﻤﺎﻝ ﺟﻤﻊ ﻭ‬
‫ﺗﻔﺮﻳﻖ ﺭﺍ ﺍﻧﺠﺎﻡ ﺩﻫﺪ‪ ،‬ﻣﺪﺍﺭ ﺑﻠﻮﮐﯽ ﮐﺎﻣﻞ ﺁﻧﺮﺍ ﺑﺼﻮﺭﺕ ‪ Carry Lookahead‬ﻭ ﻫﻤﭽﻨﻴﻦ ﻣﺪﺍﺭ ﺗﻮﻟﻴﺪ ﺳﻴﮕﻨﺎﻟﻬﺎﯼ‬
‫ﺣﺎﻟﺖ ﺁﻧﺮﺍ ﺑﺎ ﮔﻴﺘﻬﺎﯼ ﻣﻨﻄﻘﯽ ﺭﺳﻢ ﮐﻨﻴﺪ‪.‬‬
‫ﺏ‪ -‬ﻣﯽ ﺧﻮﺍﻫﻴﻢ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﭼﻬﺎﺭ ﺳﻴﮕﻨﺎﻝ ﺣﺎﻟﺖ ﺗﻮﻟﻴﺪ ﺷﺪﻩ‪ ،‬ﻣﻘﺎﻳﺴﻪ ﺩﻭ ﻋﺪﺩ ‪ A, B‬ﺭﺍ ﺑﺎ ﻋﻤﻞ ﺗﻔﺮﻳﻖ ‪ A-B‬ﻭ‬
‫ﻓﺮﻣﻮﻟﻬﺎﯼ ﺟﺪﻭﻝ ﺯﻳﺮ ﺩﺭ ﺩﻭﺣﺎﻟﺖ ﺑﺪﻭﻥ ﻋﻼﻣﺖ )‪ (unsigned‬ﻭ ﺑﺎﻋﻼﻣﺖ )‪ (signed‬ﺍﻧﺠﺎﻡ ﺩﻫﻴﻢ‪ .‬ﻓﻘﻂ ﺑﺎ‬
‫ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻳﮏ ‪ ROM‬ﺑﺎ ﺣﺪﺍﻗﻞ ﺍﺑﻌﺎﺩ ﻣﻤﮑﻦ ﭼﮕﻮﻧﻪ ﻣﯽ ﺗﻮﺍﻥ ﺍﻳﻦ ﮐﺎﺭ ﺭﺍ ﺍﻧﺠﺎﻡ ﺩﺍﺩ؟ ﺍﺑﻌﺎﺩ ‪ ROM‬ﻣﻮﺭﺩ ﺍﺳﺘﻔﺎﺩﻩ‬
‫ﺭﺍ ﺗﻌﻴﻴﻦ ﮐﻨﻴﺪ ﻭ ﺩﺍﺩﻩ ﻫﺎﯼ ‪ ۴‬ﺧﺎﻧﻪ ﺍﻭﻝ ‪ ROM‬ﺧﻮﺩ ﺭﺍ ﻧﺸﺎﻥ ﺩﻫﻴﺪ‪.‬‬
‫‪Unsigned‬‬
‫‪C = 0 and Z = 0‬‬
‫‪C=0‬‬
‫‪C=1‬‬
‫‪C = 1 or Z = 1‬‬
‫‪Z=1‬‬
‫‪Z=0‬‬
‫‪Signed‬‬
‫‪S xor V = 0 and Z = 0‬‬
‫‪S xor V = 0‬‬
‫‪S xor V = 1‬‬
‫‪S xor V = 1 or Z = 1‬‬
‫‪Z=1‬‬
‫‪Z=0‬‬
‫ﻣﻘﺎﻳﺴﻪ‬
‫‪A>B‬‬
‫‪A≥B‬‬
‫‪A<B‬‬
‫‪A≤B‬‬
‫‪A=B‬‬
‫‪A≠B‬‬
‫)‪ ۳‬ﻧﻤﺮﻩ( ‪ -۳‬ﭼﻬﺎﺭ ﻣﺎﺷﻴﻦ ﻣﺨﺘﻠﻒ ﺑﺎ ﻣﺠﻤﻮﻋﻪ ﺩﺳﺘﻮﺭﺍﻟﻌﻤﻠﻬﺎﻳﺸﺎﻥ ﺩﺭ ﺟﺪﻭﻝ ﺯﻳﺮ ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺍﻧﺪ‪ .‬ﮐﻪ ﺩﺭ‬
‫ﺁﻧﻬﺎ ‪ M‬ﻧﺸﺎﻥ ﺩﻫﻨﺪﻩ ﺣﺎﻓﻈﻪ )‪ (Memory‬ﻭ ‪ Ri‬ﻧﺸﺎﻥ ﺩﻫﻨﺪﻩ ﺛﺒﺎﺕ )‪ i (Register‬ﺍﻡ ﻣﺎﺷﻴﻦ ﻣﯽ ﺑﺎﺷﺪ‪ .‬ﺑﺮﺍﯼ‬
‫ﻫﺮﮐﺪﺍﻡ ﺍﺯ ﺍﻳﻦ ﻣﺎﺷﻴﻨﻬﺎ ﺑﺮﻧﺎﻣﻪ ﺍﯼ ﺑﻨﻮﻳﺴﻴﺪ ﮐﻪ ﻋﻤﻞ )‪ X = (A*(B+C))/(D-E+F‬ﺭﺍ ﺍﻧﺠﺎﻡ ﺩﻫﺪ‪.‬‬
‫‪M3‬‬
‫‪M2‬‬
‫‪M1‬‬
‫‪M0‬‬
‫‪3-Address‬‬
‫‪2-Address‬‬
‫‪1-Address‬‬
‫‪0-Address‬‬
‫‪Load Ri, M‬‬
‫‪Store M, Ri‬‬
‫‪Add Ri, Rj, Rk‬‬
‫‪Sub Ri, Rj, Rk‬‬
‫‪Mul Ri, Rj, Rk‬‬
‫‪Div Ri, Rj, Rk‬‬
‫ﺻﻔﺤﻪ ‪١‬‬
‫‪Load Ri, M‬‬
‫‪Store M, Ri‬‬
‫‪Add Ri, M‬‬
‫‪Sub Ri, M‬‬
‫‪Mul Ri, M‬‬
‫‪Div Ri, M‬‬
‫‪Load M‬‬
‫‪Store M‬‬
‫‪Add M‬‬
‫‪Sub M‬‬
‫‪Mul M‬‬
‫‪Div M‬‬
‫ﻣﺎﺷﻴﻦ‬
‫ﻧﺤﻮﻩ ﺁﺩﺭﺱ ﺩﻫﯽ‬
‫‪ Push M‬ﻣﺠﻤﻮﻋﻪ ﺩﺳﺘﻮﺭﺍﻟﻌﻤﻠﻬﺎ‬
‫‪Pop M‬‬
‫‪Add‬‬
‫‪Sub‬‬
‫‪Mul‬‬
‫‪Div‬‬
‫اﻣﺘﺤﺎن ﻣﻴﺎن ﺗﺮم درس ﻣﻌﻤﺎری ﮐﺎﻣﭙﻴﻮﺗﺮ )‪(۴٠٣٢٣‬‬
‫‪١٣٨٠/٩/١‬‬
‫)‪ ۵‬ﻧﻤﺮﻩ( ‪ -۴‬ﻣﯽ ﺧﻮﺍﻫﻴﻢ ﺩﺭ ﻣﺴﻴﺮ ﺩﺍﺩﻩ )‪ (Datapath‬ﭼﻨﺪ ﻣﺮﺣﻠﻪ ﺍﯼ )‪ (Multi Cycle‬ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺩﺭ ﺷﮑﻞ‬
‫ﺯﻳﺮ)ﻫﻤﺎﻥ ﻣﺴﻴﺮ ﺩﺍﺩﻩ ﺭﺳﻢ ﺷﺪﻩ ﺩﺭ ﮐﻼﺱ ﺍﺳﺖ‪ ،(.‬ﺩﺳﺘﻮﺭ ‪ SWAP‬ﺭﺍ ﺍﺟﺮﺍ ﮐﻨﻴﻢ‪ .‬ﮐﺎﺭ ﺍﻳﻦ ﺩﺳﺘﻮﺭ ﺟﺎﺑﺠﺎ ﮐﺮﺩﻥ‬
‫ﻣﺤﺘﻮﻳﺎﺕ ﺩﻭ ﺛﺒﺎﺕ )‪ (Register‬ﺑﺎ ﻳﮑﺪﻳﮕﺮ ﺍﺳﺖ‪.‬‬
‫ﺍﻟﻒ‪ -‬ﻣﯽ ﺧﻮﺍﻫﻴﻢ ﺑﺎ ﮐﻤﺘﺮﻳﻦ ﺗﻐﻴﻴﺮ ﺩﺭ ﻣﺴﻴﺮ ﺩﺍﺩﻩ ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺑﺪﻭﻥ ﺗﻐﻴﻴﺮ ﺩﺭ ‪ Register File‬ﺍﻳﻦ ﺩﺳﺘﻮﺭ ﺭﺍ‬
‫ﺍﺟﺮﺍ ﮐﻨﻴﻢ‪ ،‬ﺗﻐﻴﻴﺮﺍﺕ ﺧﻮﺩ ﺭﺍ ﺑﺎ ﺷﮑﻞ ﻧﺸﺎﻥ ﺩﻫﻴﺪ‪ .‬ﻧﻮﻉ ﺩﺳﺘﻮﺭ ‪ SWAP‬ﻭ ﻫﻤﭽﻨﻴﻦ ﻣﻘﺎﺩﻳﺮ ﻣﺨﺘﻠﻒ ﻓﻴﻠﺪﻫﺎﯼ‬
‫)‪ (Fields‬ﺁﻧﺮﺍ ﺗﻌﻴﻴﻦ ﮐﻨﻴﺪ‪ ،‬ﻭ ﺳﻴﮑﻠﻬﺎﯼ ﻣﺨﺘﻠﻒ ﺍﺟﺮﺍﯼ ﺍﻳﻦ ﺩﺳﺘﻮﺭ ﺭﺍ ﺍﺯ ﺍﺑﺘﺪﺍ ﺗﺎ ﺍﻧﺘﻬﺎ ﺑﺼﻮﺭﺕ ‪ RTL‬ﻧﺸﺎﻥ‬
‫ﺩﻫﻴﺪ‪.‬‬
‫ﺏ‪ -‬ﭼﮕﻮﻧﻪ ﻣﯽ ﺗﻮﺍﻥ ﺑﺪﻭﻥ ﺗﻐﻴﻴﺮ ﺩﺭ ‪ ، Register File, ALU‬ﺗﻨﻬﺎ ﺑﺎ ﺗﻐﻴﻴﺮ ﻋﻨﺎﺻﺮ ﺩﻳﮕﺮ ﻭ ﻳﺎ ﺍﺿﺎﻓﻪ ﮐﺮﺩﻥ‬
‫ﻋﻨﺎﺻﺮ ﺟﺪﻳﺪ ﺍﻳﻦ ﺩﺳﺘﻮﺭ ﺭﺍ ﺩﺭ ﺳﺮﻳﻌﺘﺮﻳﻦ ﺣﺎﻟﺖ ﻣﻤﮑﻦ ﺍﺟﺮﺍ ﮐﺮﺩ‪ .‬ﺗﻐﻴﻴﺮﺍﺕ ﺧﻮﺩ ﺭﺍ ﺑﺎ ﺷﮑﻞ ﻧﺸﺎﻥ ﺩﻫﻴﺪ‪ .‬ﺩﺭ‬
‫ﺍﻳﻦ ﺣﺎﻟﺖ ﻧﻮﻉ ﺩﺳﺘﻮﺭ ‪ SWAP‬ﻭ ﻫﻤﭽﻨﻴﻦ ﻣﻘﺎﺩﻳﺮ ﻣﺨﺘﻠﻒ ﻓﻴﻠﺪﻫﺎﯼ )‪ (Fields‬ﺁﻧﺮﺍ ﺗﻌﻴﻴﻦ ﮐﻨﻴﺪ )ﺍﮔﺮ ﻧﺴﺒﺖ ﺑﻪ‬
‫ﺣﺎﻟﺖ ﻗﺒﻞ ﺗﻐﻴﻴﺮﯼ ﮐﺮﺩﻩ ﺍﺳﺖ‪ ،(.‬ﻭ ﺳﻴﮑﻠﻬﺎﯼ ﺍﺟﺮﺍﻳﻲ ﺟﺪﻳﺪ ﺭﺍ ﺑﺼﻮﺭﺕ ‪ RTL‬ﻧﻤﺎﻳﺶ ﺩﻫﻴﺪ‪ ALU) .‬ﺗﻨﻬﺎ‬
‫ﺍﻋﻤﺎﻝ ﺭﻳﺎﺿﯽ ﺟﻤﻊ ﻭ ﺗﻔﺮﻳﻖ ﻭ ﺍﻋﻤﺎﻝ ﻣﻨﻄﻘﯽ ‪ AND, OR‬ﺭﺍ ﻣﯽ ﺗﻮﺍﻧﺪ ﺍﻧﺠﺎﻡ ﺩﻫﺪ‪(.‬‬
‫)‪ ۹‬ﻧﻤﺮﻩ( ‪ -۵‬ﭘﺮﺩﺍﺯﻧﺪﻩ ﺍﯼ ‪ ۱۶‬ﺑﻴﺘﯽ ﺑﺎ ﻣﺴﻴﺮ ﺩﺍﺩﻩ )‪ (Datapath‬ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺩﺭ ﺷﮑﻞ ﺯﻳﺮ ﺑﺎ ﻣﺸﺨﺼﺎﺕ ﺫﮐﺮ‬
‫ﺷﺪﻩ ﺩﺭ ﺍﺩﺍﻣﻪ ﺩﺍﺩﻩ ﺷﺪﻩ ﺍﺳﺖ‪:‬‬
‫ﺻﻔﺤﻪ ‪٢‬‬
١٣٨٠/٩/١
(۴٠٣٢٣) ‫اﻣﺘﺤﺎن ﻣﻴﺎن ﺗﺮم درس ﻣﻌﻤﺎری ﮐﺎﻣﭙﻴﻮﺗﺮ‬
ƒ
‫ ﻭ ﻳﮏ‬A, B ‫( ﺧﺮﻭﺟﯽ‬Port) ‫ ﺑﻴﺘﯽ ﻭ ﺩﻭ ﺩﺭﮔﺎﻩ‬۱۶ (Register) ‫ ﺛﺒﺎﺕ‬۸ ‫ ﺑﺎ‬Register File
.W ‫ﺩﺭﮔﺎﻩ ﻭﺭﻭﺩﯼ‬
ƒ
.‫( ﺑﺎ ﻣﺸﺨﺼﺎﺕ ﺫﮐﺮ ﺷﺪﻩ ﺩﺭ ﺟﺪﺍﻭﻝ ﺯﻳﺮ‬Shift Unit) SHU ‫ ﺑﻴﺘﯽ ﻭ ﻭﺍﺣﺪ‬۱۶ ALU
ALUctrl
000
001
010
011
100
101
110
111
ALU Operation
A
B
A+B
A-B
NOT A
NOT B
A AND B
A OR B
SHUctrl
00
01
10
11
SHU Operation
S
SHL S
LSHR S
ASHR S
Meaning
Pass Input
Shift Left Input
Logical Shift Right Input
Arithmethic Shift Right Input
MDR(Memory Data Register), MAR(Memory Address
ƒ
‫ ﺑﻴﺘﯽ‬۱۶ ‫ﺛﺒﺎﺗﻬﺎﯼ‬
Register), PC, A, B
.‫ﺳﺎﺧﺘﺎﺭ ﺣﺎﻓﻈﻪ ﺑﺎ ﻣﻌﻤﺎﺭﯼ ﻫﺎﺭﻭﺍﺭﺩ‬
ƒ
:‫ﻣﺠﻤﻮﻋﻪ ﺩﺳﺘﻮﺭ ﺍﻟﻌﻤﻠﻬﺎﯼ ﺯﻳﺮ‬
ƒ
op
2
rd
3
rs
3
rt
3
func
3
op = 00 ‫ ﺑﺎ‬AL ‫ ﺩﺳﺘﻮﺭﺍﺕ ﻧﻮﻉ‬R[rt] <- sh ( R[rs] func R[rd] ) ; PC <- PC + 2
‫ ﺭﻭﯼ ﺁﻧﻬﺎ ﺍﻧﺠﺎﻡ ﺷﺪﻩ ﻭ‬func ‫ ﺩﺍﺩﻩ ﺷﺪﻩ ﻭ ﻋﻤﻞ‬ALU ‫ ﺑﻪ‬rd ‫ ﻭ‬rs ‫ﺩﺭ ﺍﻳﻦ ﺩﺳﺘﻮﺭﺍﺕ ﺛﺒﺎﺗﻬﺎﯼ‬
‫ ﺩﺭ ﻧﻬﺎﻳﺖ ﻧﺘﻴﺠﻪ‬.‫ ﺭﻭﯼ ﺁﻧﻬﺎ ﺍﻧﺠﺎﻡ ﻣﯽ ﮔﺮﺩﺩ‬sh ‫ ﻓﺮﺳﺘﺎﺩﻩ ﻣﯽ ﺷﻮﺩ ﻭ ﮐﺎﺭ‬SHU ‫ﻧﺘﻴﺠﻪ ﺑﻪ ﻭﺍﺣﺪ‬
.‫ ﺫﺧﻴﺮﻩ ﻣﯽ ﺷﻮﺩ‬rt ‫ﺩﺭ ﺛﺒﺎﺕ‬
٣ ‫ﺻﻔﺤﻪ‬
sh
2
‫اﻣﺘﺤﺎن ﻣﻴﺎن ﺗﺮم درس ﻣﻌﻤﺎری ﮐﺎﻣﭙﻴﻮﺗﺮ )‪(۴٠٣٢٣‬‬
‫‪Imm8‬‬
‫‪8‬‬
‫‪rd‬‬
‫‪3‬‬
‫‪rs‬‬
‫‪3‬‬
‫‪١٣٨٠/٩/١‬‬
‫‪op‬‬
‫‪2‬‬
‫ ﺩﺳﺘﻮﺭ ‪ Load‬ﺑﺎ ‪op = 01‬‬‫‪R[rd] <- Dmem[ R[rs]+sign_extend(imm8)] ; PC<- PC + 2‬‬
‫ﺍﺯ ﺁﺩﺭﺱ ﺗﻮﻟﻴﺪ ﺷﺪﻩ ﺩﺍﺩﻩ ﺍﺯ ﺣﺎﻓﻈﻪ ﺩﺍﺩﻩ ﺧﻮﺍﻧﺪﻩ ﺷﺪﻩ ﻭ ﺩﺭ ﺛﺒﺎﺕ ‪ rd‬ﺫﺧﻴﺮﻩ ﻣﯽ ﮔﺮﺩﺩ‪.‬‬
‫‪rs‬‬
‫‪3‬‬
‫‪Imm8‬‬
‫‪8‬‬
‫‪op‬‬
‫‪2‬‬
‫‪rd‬‬
‫‪3‬‬
‫ ﺩﺳﺘﻮﺭ ‪ Store‬ﺑﺎ ‪op = 10‬‬‫‪Dmem[ R[rs]+sign_extend(imm8)] <- R[rd] ; PC<- PC + 2‬‬
‫ﺩﺭ ﺁﺩﺭﺱ ﺗﻮﻟﻴﺪ ﺷﺪﻩ ﻣﺤﺘﻮﺍﯼ ﺛﺒﺎﺕ ‪ rd‬ﺩﺭ ﺣﺎﻓﻈﻪ ﺩﺍﺩﻩ ﻧﻮﺷﺘﻪ ﻣﯽ ﺷﻮﺩ‪.‬‬
‫‪Imm6‬‬
‫‪6‬‬
‫‪bv‬‬
‫‪1‬‬
‫‪bc‬‬
‫‪1‬‬
‫‪bs‬‬
‫‪1‬‬
‫‪bz‬‬
‫‪1‬‬
‫‪mv‬‬
‫‪1‬‬
‫‪mc‬‬
‫‪1‬‬
‫‪ms‬‬
‫‪1‬‬
‫‪mz‬‬
‫‪1‬‬
‫‪op‬‬
‫‪2‬‬
‫ ﺩﺳﺘﻮﺭ ‪ Branch‬ﺑﺎ ‪op = 11‬‬‫‪if (condition) then PC <- PC + 2 + sign_extend(imm6) << 1‬‬
‫‪else PC <- PC + 2‬‬
‫ﮐﻪ ﺩﺭ ﺁﻥ‪:‬‬
‫‪condition = (NOT mz OR bz XNOR z) AND (NOT ms OR bs XNOR s) AND‬‬
‫)‪(NOT mc OR bc XNOR c) AND (NOT mv OR bv XNOR v‬‬
‫ﺍﮔﺮ ﺷﺮﻁ ﮔﻔﺘﻪ ﺷﺪﻩ ﺩﺭ ‪ condition‬ﻳﮏ ﺑﺎﺷﺪ‪ ،‬ﭘﺮﺵ ﺷﺮﻃﯽ ﺑﻪ ﺁﺩﺭﺱ ﮔﻔﺘﻪ ﺷﺪﻩ ﺍﻧﺠﺎﻡ ﻣﯽ‬
‫ﺷﻮﺩ ﻭ ﺩﺭ ﻏﻴﺮ ﺍﻳﻦ ﺻﻮﺭﺕ ﭘﺮﺵ ﺍﻧﺠﺎﻡ ﻧﻤﯽ ﺷﻮﺩ‪.‬‬
‫ﺩﺭ ﻋﺒﺎﺭﺕ ﺷﺮﻁ ﻧﻴﺰ ﺑﻴﺘﻬﺎﯼ ‪ z, s, c, v‬ﺧﺮﻭﺟﻴﻬﺎﯼ ‪ ALU‬ﻫﺴﺘﻨﺪ‪.‬‬
‫ﺍﻟﻒ‪ -‬ﻣﺎﺷﻴﻦ ﺣﺎﻟﺖ ﻣﺤﺪﻭﺩ )‪ (FSM‬ﻭﺍﺣﺪ ﮐﻨﺘﺮﻝ )‪ (Controller‬ﺍﻳﻦ ﻣﺎﺷﻴﻦ ﺭﺍ ﺭﺳﻢ ﮐﺮﺩﻩ ﻭ ﺩﺭ ﻫﺮ ﺣﺎﻟﺖ‬
‫ﺍﻧﺘﻘﺎﻝ ﺛﺒﺎﺗﻬﺎﯼ ﺍﻧﺠﺎﻡ ﺷﺪﻩ ﺭﺍ ﺑﺼﻮﺭﺕ ‪ RTL‬ﺑﻨﻮﻳﺴﻴﺪ‪.‬‬
‫ﺏ‪ -‬ﻣﯽ ﺧﻮﺍﻫﻴﻢ ﻭﺍﺣﺪ ﮐﻨﺘﺮﻝ ﺭﺍ ﺑﺼﻮﺭﺕ ‪ Microprogram‬ﺑﺮﻧﺎﻣﻪ ﺭﻳﺰﯼ ﮐﻨﻴﻢ‪ .‬ﻓﺮﻣﺖ ﺭﻳﺰ ﺩﺳﺘﻮﺭﺍﻟﻌﻤﻞ‬
‫)‪ (Micro Instruction‬ﺁﻧﺮﺍ ﻃﺮﺍﺣﯽ ﮐﺮﺩﻩ ﻭ ﺑﮕﻮﻳﻴﺪ ﻫﺮ ﻓﻴﻠﺪ )‪ (Field‬ﺁﻥ ﭼﻪ ﻣﻘﺎﺩﻳﺮﯼ ﺭﺍ ﺑﻪ ﺧﻮﺩ ﻣﯽ ﺗﻮﺍﻧﺪ‬
‫ﺑﮕﻴﺮﺩ‪.‬‬
‫ﺝ‪ -‬ﺑﺮ ﺍﺳﺎﺱ ﺭﻳﺰ ﺩﺳﺘﻮﺭﺍﻟﻌﻤﻠﯽ ﮐﻪ ﺩﺭ ﻗﺴﻤﺖ ﺏ ﻃﺮﺍﺣﯽ ﮐﺮﺩﻩ ﺍﻳﺪ‪ ،‬ﺭﻳﺰ ﺩﺳﺘﻮﺭ ﺍﻟﻌﻤﻠﻬﺎﯼ ﻣﺮﺑﻮﻁ ﺑﻪ ﺩﺳﺘﻮﺭﺍﺕ‬
‫ﻧﻮﻉ ‪ AL‬ﺭﺍ ﻧﺸﺎﻥ ﺩﻫﻴﺪ‪.‬‬
‫ﻣﻮﻓﻖ ﺑﺎﺷﻴﺪ‪.‬‬
‫ﻗﺮﻩ ﺑﺎﻏﯽ‬
‫ﺻﻔﺤﻪ ‪۴‬‬