Introduction to
SystemC
Part of
HW/SW Codesign of Embedded
Systems Course (CE 40-226)
Winter-Spring 2001
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Today programme
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Introduction to SystemC
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History
Highlights
Design Methodology
A simple SystemC program
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VSIA SLD
Data Types
Spec (draft)
SystemC History
Synopsys
Synopsys
ATG
“Scenic”
UC
Irvine
1996
Synopsys
SystemC
v0.90
Sep. 99
“Fridge”
Frontier Design
A/RT Library
1991
imec
1992
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CoWare
“N2C”
1997
Fixed Point
Types
Abstract
Protocols
Codesign of Embedded Systems
SystemC
v1.0
Apr. 00
SystemC
v1.1
Jun. 00
3
SystemC Highlights
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Features as a codesign language
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Modules
Processes
Ports
Signals
Rich set of port and
signal types
Rich set of data types
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Clocks
Cycle-based simulation
Multiple abstraction
levels
Communication protocols
Debugging support
Waveform tracing
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Current
System Design Methodology
C/C++
System Level Model
Refine
Analysis
Manual Conversion
VHDL/Verilog
Simulation
Results
Synthesis
Rest of Process
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Current System Design
Methodology (cont’d)
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Problems
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Errors in manual conversion from C to HDL
Disconnect between system model and
HDL model
Multiple system tests
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SystemC Design Methodology
SystemC Model
Simulation
Refinement
Synthesis
Rest of Process
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SystemC Design Methodology
(cont’d)
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Advantages
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Refinement methodology
Written in a single language
Higher productivity
Reusable testbenches
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SystemC programming model
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Mod 1
Mod 2
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A set of modules
interacting through
signals.
Module functionality
is described by
Mod 3
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processes.
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SystemC programming model
(cont’d)
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System (program) debug/validation
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Testbench
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Normal C++ IDE facilities
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Simulation, Waveform view of signals
Watch, Evaluate, Breakpoint, ...
sc_main() function
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instantiates all modules
initializes clocks
initializes output waveform files
starts simulation kernel
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A Simple Example:
Defining a Module
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a
b
c
d
Complex-number Multiplier
(a+bi)*(c+di) = (ac-bd)+(ad+bc)i
e
Complex
Multiplier
f
(cmplx_mult)
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SC_MODULE(cmplx_mult) {
sc_in<int> a,b;
sc_in<int> c,d;
sc_out<int> e,f;
...
}
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A Simple Example:
Defining a Module (cont’d)
SC_MODULE(cmplx_mult) {
sc_in<int> a,b;
sc_in<int> c,d;
void cmplx_mult::calc()
{
e = a*c-b*d;
f = a*d+b*c;
sc_out<int> e,f;
void calc();
}
SC_CTOR(cmplx_mult) {
SC_METHOD(calc);
sensitive<<a<<b<<c<<d;
}
}
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Completing the Design
M1
a
b
M2
input_gen
c
d
Complex
Multiplier
e
f
M3
display
Clk.signal()
clk
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Completing the Design:
input_gen module
SC_MODULE(input_gen) {
sc_in<bool> clk;
sc_out<int> a,b;
sc_out<int> c,d;
void input_gen::generate()
{
int a_val=0, c_val=0;
while (true) {
a = a_val++;
wait();
c = (c_val+=2);
wait();
}
void generate();
SC_CTOR(input_gen) {
SC_THREAD(generate);
sensitive_pos(clk);
}
}
}
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Completing the Design:
display module
SC_MODULE(display) {
sc_in<int> e,f;
void display::show()
{
void show();
cout<<e<<‘+’<<f<<“i\n”;
SC_CTOR(display) {
SC_METHOD(show);
sensitive<<e<<f;
}
}
}
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Putting it all together:
sc_main function
#include <systemc.h>
M2.a(a); M2.b(b);
M2.c(c); M2.d(d);
M2.e(e); M2.f(f);
int sc_main()
{
M3.e(e); M3.f(f);
input_gen M1(“I_G”);
cmplx_mult M2(“C_M”);
display
M3(“D”);
sc_signal<int> a,b,c,d,e,f;
sc_clock clk(“clk”,20,0.5);
sc_start(100);
return 0;
}
M1.clk(clk.signal());
M1.a(a); M1.b(b);
M1.c(c); M1.d(d);
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What we learned today
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What’s SystemC
SystemC advantages
SystemC programming model
Writing programs in SystemC
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Complementary notes:
Assignments
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Send your assignments to
ce226@ce.sharif.edu
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Today is due date for Assignment 2
Take Assignmentak 3
Due date: Sat. Farvardin 25th
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Complementary notes:
SystemC Installation
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Refer to http://ce.sharif.edu/~ce226
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Under “References” tab, find SystemC 1.0
user’s guide and installation files, and
SystemC_Win utility
We start by SystemC 1.0, later will cover
1.1 and talk about 2.0
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