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ECL Pro™ Logic ECLinPS™ Logic Find Search for Jump to: SuperLite CML Logic ECLinPS Lite™ Translators Super 300K™ Logic ECL Pro Logic ECL Pro Ordering Information and Marking Instructions ECL Pro Logic Data Sheets SY10EP01V 5V/3.3V 4-Input OR/NOR SY10EP05V 5V/3.3V Differential AND/NAND SY10EP08V Differential 2-Input XOR/XNOR SY10EP16V High-Speed Differential Receiver SY10EP31V 5V/3.3V D Filp-Flop with Set and Reset SY10EP51V 5V/3.3V D Flip-Flop With Reset And Differential Clock SY10EP52V 5V/3.3V Differential Data and Clock D Filp-Flop SY10EP53V 5V/3.3V Differential Data and Clock D Flip-Flop With Set And Reset SY10EP58V 5V/3.3V 2:1 Multiplexer SY10EP89V 5V/3.3V 3GHz Coaxial Cable Driver SY10/100EP11U 2.5V/3.3V/5V 1:2 Differential PECL/LVPECL/ECL Fanout Buffer SY10/100EP32V 5V/3.3V ÷ 2 Divider SY10/100EP33V 5V/3.3V ÷ 4 Divider SY10/100EPT20V 3.3V/5V LVTTL/LVCMOS-to-Differential LVPECL Translator SY10/100EPT28L 3V LVTTL-to-Differential LVPECL and Differential LVPECL-to-LVTTL Translator SY100EP111U 2.5V/3.3V 1:10 Differential LVPECL/LVECL/HSTL Clock Driver SY100EP140L 3.3V PECL/ECL Differential Phase-Frequency Detector SY100EP14U 2.5V/3.3V/5V 1:5 LVPECL/PECL/ECL/HSTL 2GHz Clock Driver with 2:1 Differential Input Mux SY100EP16VS 5V/3.3V 2.5Gbps Variable Output Swing Differential Receiver SY100EP210U 2.5V/3.3V Dual 1:5 Differential LVECL/LVPECL/HSTL Clock Driver SY100EP56V 3.3V/5V PECL/ECL 3GHz Dual Differential 2:1 Multiplexer SY100EP57V 3.3V/5V PECL/ECL 3GHz Dual Differential 4:1 Multiplexer SY100EPT21L 3.3V Differential LVPECL-to-LVTTL Translator SY100EPT22V 3.3V/5V Dual LVTTL/LVCMOS-to-Differential LVPECL Translator SY100EPT23L 3.3V Dual Differential LVPECL-to-LVTTL Translator ECL Pro™ Logic ECLinPS™ Logic Jump to: SuperLite CML Logic ECLinPS Lite™ Translators Super 300K™ Logic SuperLite CML Logic http://www.micrel.com/product-info/ecl_logic.shtml 27.01.2002 ECL Logic Seite 2 von 6 SuperLite Ordering Information and Marking Instructions SuperLite CML Logic Data Sheets SY55851 2.5V/3V, 3.0GHz CML AnyGate™Any Logic W/50 SY55851A Or 100 Outputs SY55852U D Flip-Flop SY55853U D Latch SY55854U 2 X 2 Protection Crosspoint Switch SY55855V Dual CML/PECL/LVPECL-TO-LVDS Translator SY55856U 2.5V/3.3V 2.5GHz Differential 2-Channel Precision CML Delay Line SY55857L 3.3V, 1.3Gbps Any Input-to-LVPECL Translator SY55858U 2.5V/3.3V 3.0GHz Dual 2 X 2 CML Crosspoint Switch w/Internal Termination Jump to: SuperLite CML Logic ECLinPS Lite™ ECL Pro™ Logic ECLinPS™ Logic Translators Super 300K™ Logic ECLinPS™ Logic ECLinPS and ECLinPS Lite Standard DC Specifications ECLinPS Ordering Information and Marking Instructions ECLinPS™ Logic Data Sheets SY10/100E016 8-Bit Synchronous Binary Up Counter SY10/100E101 Quad 4-Input OR/NOR Gate SY10/100E104 Quint 2-Input AND/NAND Gate SY10/100E107 Quint 2-Input XOR/XNOR Gate SY10/100E111 1:9 Differential Clock Driver with Enable SY10/100E111A/L 5V/3.3V 1:9 Diff. Clock Driver (without Enable) SY10/100E111AE/LE 5V/3.3V 1:9 Diff. Clock Driver (with Enable) SY10/100E112 Quad Driver SY10/100E116 Quint Differential Line Receiver SY10/100E122 9-Bit Buffer SY10/100E131 4-Bit D Flip-Flop SY10/100E136 6-Bit Universal Up/Down Counter SY10/100E137 8-Bit Ripple Counter SY10/100E141 8-Bit Shift Register SY10/100E142 9-Bit Shift Register SY10/100E143 9-Bit Hold Register SY10/100E150 6-Bit D Latch SY10/100E151 6-Bit D Register SY10/100E154 5-Bit 2:1 Mux-Latch SY10/100E155 6-Bit 2:1 Mux-Latch SY10/100E156 3-Bit 4:1 Mux-Latch SY10/100E157 Quad 2:1 Multiplexer http://www.micrel.com/product-info/ecl_logic.shtml 27.01.2002 ECL Logic Seite 3 von 6 SY10/100E157 Quad 2:1 Multiplexer SY10/100E158 5-Bit 2:1 Multiplexer SY10/100E160 12-Bit Parity Generator/Checker SY10/100E163 2-Bit 8:1 Multiplexer SY10/100E164 16:1 Multiplexer SY10/100E166 9-Bit Magnitude Comparator SY10/100E167 6-Bit 2:1 Mux-Register SY10/100E171 3-Bit 4:1 Multiplexer SY10/100E175 9-Bit Latch with Parity SY10/100E193 Error Detection/Correction Circuit SY10/100E195 Programmable Delay Chip SY10/100E196 Programmable Delay Chip SY10/100E212 3-Bit Scannable Register SY10/100E241 8-Bit Scannable Register SY10/100E256 3-Bit 4:1 Mux-Latch SY10/100E336 3-Bit Registered Bus Transceiver SY10/100E337 3-Bit Scannable Registered Bus Transceiver SY10/100E404 Quad Differential AND/NAND SY10/100E416 Quint Differential Line Receiver SY10/100E431 3-Bit Differential Flip-Flop SY10/100E445 4-Bit Serial/Parallel Converter SY10/100E446 4-Bit Parallel-to-Serial Converter SY10/100E451 6-Bit Register Differential Data Clock SY10/100E452 5-Bit Differential Register SY10/100E457 Triple Differential 2:1 Multiplexer SY100E417 Quint LVPECL-to-PECL or PECL-to-LVPECL Translator Jump to: ECL Pro™ Logic ECLinPS™ Logic SuperLite CML Logic ECLinPS Lite™ Translators Super 300K™ Logic ECLinPS Lite™ ECLinPS Lite Family Specifications ECLinPS and ECLinPS Lite Standard DC Specifications ECLinPS Lite™ Ordering Information and Marking Instructions ECLinPS Lite™ Data Sheets SY10EL1189 Fibre Channel Coaxial Cable Driver and Loop Resiliency Circuit SY10EL89 Coaxial Cable Driver SY10/100EL01 4-Input OR/NOR SY10/100EL04 2-Input AND/NAND SY10/100EL05 2-Input Differential AND/NAND http://www.micrel.com/product-info/ecl_logic.shtml 27.01.2002 ECL Logic Seite 4 von 6 SY10/100EL07 2-Input XOR/XNOR SY10/100EL11V 5V/3.3V 1:2 Differential Fanout Buffer SY10/100EL12 Low-Impedance Driver SY10/100EL15 1:4 Clock Distribution SY10/100EL16V 5V/3.3V Differential Receiver SY10/100EL16VAVF Enhanced Differential Receiver SY10/100EL31 D Flip-Flop with Set and Reset SY10/100EL32V 5V/3.3V ÷2 Divider SY10/100EL33/L 5V/3.3V ÷4 Divider SY10/100EL34/L 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip SY10/100EL35 JK Flip-Flop SY10/100EL38/L 5V/3.3V ÷2, ÷4/6 Clock Generation Chip SY10/100EL51 Differential Clock D Flip-Flop SY10/100EL52 Differential Data and Clock D Flip-Flop SY10/100EL57 4:1 Differential Multiplexer SY10/100EL58 2:1 Multiplexer SY10/100ELT20V 5V/3.3V TTL-to-Differential PECL Translator SY10/100ELT21 Differential PECL-to-TTL Translator SY10/100ELT21L 3.3V Differential LVPECL-to-LVTTL Translator SY10/100ELT22 Dual TTL-to-Differential PECL Translator SY10/100ELT22L 3.3V Dual TTL-to-Differential PECL Translator SY10/100ELT23 Dual Differential PECL-to-TTL Translator SY10/100ELT23L 3.3V Dual Differential PECL-to-TTL Translator SY10/100ELT28 5V TTL-to-Differential PECL and Differential PECL-to-TTL Translator SY100EL1001 Laser Diode Driver with Input D Flip-Flop SY100EL1003 Laser Diode Driver with Output Enable SY100EL14V 5V/3.3V 1:5 Clock Distribution SY100EL15L 3.3V 1:4 Clock Distribution IC SY100EL16VO 3.3V/5V 800MHz Precision PECL Amplifier with Low Gain Feedback SY100EL16VS 5V/3.3V Variable Output Swing Differential Receiver SY100EL17V 5V/3.3V Quad Differential Receiver SY100EL29V 5V/3.3V Dual Differential Data and Clock D Flip-Flop with Set and Reset SY100EL56V 5V/3.3V Dual Differential 2:1 Multiplexer SY100EL57L 3.3V 4:1 Differential Multiplexer SY100EL90V 5V/3.3V Triple ECL/LVECL-to- PECL/LVPECL Translator SY100EL91 Triple PECL-to- ECL Translator SY100EL91L 3.3V Triple LVPECL-to-ECL or LVPECL-to-LVECL Translator SY100EL92 Triple LVPECL-to-PECL or PECL-to-LVPECL Translator SY100ELT24 TTL-to-Differential ECL Translator SY100ELT25 Differential ECL-to-TTL Translator SY100ELT982 PECL-to-CML Translator with Output Enable Jump to: ECL Pro™ Logic ECLinPS™ Logic SuperLite CML Logic ECLinPS Lite™ http://www.micrel.com/product-info/ecl_logic.shtml Translators Super 300K™ Logic 27.01.2002 ECL Logic Seite 5 von 6 Super 300K™ Logic Super-300K Standard DC Specifications Super-300K Ordering Information and Marking Information Super 300K™ Logic Data Sheets SY100S301 Triple 5-Input OR/NOR Gate SY100S302 Quint 2-Input OR/NOR Gate SY100S304 Quint AND/NAND Gate SY100S307 Quint Exclusive OR/NOR Gate SY100S313 Quad Driver SY100S314 Quint Differential Line Receiver SY100S317 Triple 2-Wide OA/OAI Gate SY100S318 5-Wide 5, 4, 4, 2 OA/OAI Gate SY100S321 Low-Power 9-Bit Inverter SY100S322 9-Bit Buffer SY100S324 Low-Power Hex TTL-to-ECL Translator SY100S325 Low-Power Hex ECL-to-TTL Translator SY100S331 Triple D Flip-Flop SY100S336 4-Stage Counter/Shift Register SY100S336A Enhanced 4-Stage Counter/Shift Register SY100S341 8-Bit Shift Register SY100S350 Hex D-Latch SY100S351 Hex D Flip-Flop SY100S355 Quad Multiplexer/Latch SY100S360 Dual Parity Checker/Generator SY100S363 Dual 8-Input Multiplexer SY100S364 16-Input Multiplexer SY100S366 9-Bit Comparator SY100S370 Universal Demultiplexer/Decoder SY100S371 Triple 4-Input Multiplexer with Enable SY100S391 Low-Power Hex TTL-to-PECL Translator SY100S811 Single Supply 1:9 PECL/TTL-to-PECL SY100S815 Single Supply Quad PECL/TTL-to-PECL SY100S834/L (÷ 1, ÷2, ÷4) or (÷2, ÷4, ÷8) Clock Generation Chip SY100S838/L (÷1, ÷2÷4) or (÷2, 4÷6) Clock Generation Chip SY100S839V ÷2/4, ÷4/5/6 CLOCK GENERATION CHIP SY100S863 8-Input PECL Differential MUX with TTL Selects SY100S891 5-Bit Registered Transceiver To view the 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