Teaching Nanoelectronic Devices
Jerry G. Fossum
SOI Group
Department of Electrical and Computer Engineering
University of Florida
Gainesville, FL 32611-6130, U.S.A.
J. G. Fossum / 1
Outline
* CMOS Scaling
* Nonclassical Devices
* Teaching Issues
* A Novel Graduate Course
* Summary
J. G. Fossum / 2
Projected HP CMOS Gate-Length Scaling*
7nm !
*2003 SIA ITRS
J. G. Fossum / 3
CMOS Scalability (to Lgate < 45nm)?
Classical Devices
Nonclassical UTB Devices
Bulk Si
PD/SOI
FD/SOI
DG
G
G
G
B
Gf
B
S
S
B
D
S
B
D
D
S
D
Gb
BOX
BOX
Si Substrate
Si Substrate
Si Substrate
Si Substrate
No,
No,
Maybe,
Yes;
but could be
enhanced via
strained-Si
channels.
but with (e.g., floatingbody) performance
advantage over bulk
Si.
but extremely thin
SOI (ultra-thin
body) will be
needed.
thin Si is needed, but
performance
potential is high and
technology can be
pragmatic.
J. G. Fossum / 4
Nonclassical UTB Devices
Lgate
Lgate
Gf toxf
y
S
Gf toxf
Wgate
D
tSi
y
S
x
x
toxb
tSi
Wgate
D
Gb toxb
BOX
Generic DG MOSFET
(SDG or ADG)
Substrate (Gb)
SG FD/SOI MOSFET
Gf
Gf
z
x hSi
wSi
toxb
BOX
Lgate
z
x hSi
wSi
Lgate
toxf
toxf
Nanowires
toxb
BOX
Substrate (Gb)
Substrate
Tri-Gate (TG) MOSFET
Gate-All-Around (GAA) MOSFET
J. G. Fossum / 5
Nonclassical Devices: Truly Different Structures
DG FinFET
tSi < 10nm
?
Carbon Nanotube FET
Lgate < 10nm
Diameter ~ 1-2nm
(defined by chemistry, not processing)
J. G. Fossum / 6
DG MOSFET: Challenging Technology, Superior Features, Complex Physics
y
Gf
* short-channel effects (SCEs)
* quasi-ballistic/ballistic transport
* thermal injection velocity (vinj)
* quantum transport (S-D tunneling)
ΦGf t
oxf
x
S
7nm ⇒
Lgate
n+
p
n+
D
ΦGb toxb
tSi
Gb
3nm ⇒
* Gf-Gb charge coupling
* tSi-dependent quantization (QM)
* 2D DOS with Fermi-Dirac statistics
* volume inversion
* QM-defined µn and vinj
Understanding nonclassical devices
requires strong backgrounds in
solid-state physics and quantum mechanics!
J. G. Fossum / 7
New Physics, e.g., that underlying channel n(x):
Symmetrical DG nMOSFET
18
12
x 10
VGS=0.0 V
VGS=0.5 V
VGS=1.0 V
Electron density [cm−3]
10
8
6
4
(volume inversion)
classical (3D electrons)
2
0
Qi = q ∫
t inv
0
n dx
14
w⁄
E F – E c

n = N c ( 3D ) F 1 ⁄ 2 ------------------ kBT 
16
18
Position [nm]
Qi = q ∫
t Si
0
20
22
E F – E min

n dx = qN c ( 2D ) ln 1 + exp -----------------------

kT
J. G. Fossum / 8
New (Solid-State & Quantum) Physics
* structural confinement of electrons/holes
* energy quantization (eigenvalues of SWE)
* 2D electrons/holes (DOS)
* quantum n(x)/p(x) (eigenfunctions of SWE)
* degenerate electrons/holes (Fermi-Dirac)
* many-body effects (exchange energy, BGN)
* lattice-orientation effects
* lattice-strain effects
* quantum tunneling (through G dielectric, S/D junctions, and S-D barrier)
* ballistic (thermal injection), quasi-ballistic transport (BTE 2nd moment)
J. G. Fossum / 9
Teaching Issues
* Large EE-physics overlap in nanoelectronic
device/circuit area.
* Inadequate student backgrounds.
* Inadequate curricula.
* Declining population of nanoelectronic students.
J. G. Fossum / 10
A Novel Graduate Course:
“Nonclassical Si-Based Nanoscale CMOS Devices”
* Lectures are based on current literature, but are centered around a
physics-based compact DG MOSFET model (UFDG) to bring device,
circuit, and physics students together. UFDG is used as a teaching tool
that students with various backgrounds can relate to.
* Prerequisite is a classical scaled CMOS device design course, which is
focused on channel-doping engineering.
* Computer simulation-based project involving nonclassical devices
and/or circuits is assigned, in lieu of final exam. UFDG/Spice is made
available for the project, as well as numerical device simulators.
* Objectives are to encourage students to enter the device area, as well
as to teach the physics-based properties of nanoelectronic devices.
J. G. Fossum / 11
UFDG: A Process/Physics-Based Predictive Compact Model
Applicable to Generic UTB DG MOSFETs
Wg Gf
ΦGf
Gf = Gb
S
n+
Lmet p
tSi
n+
D
tSi
ΦGb
Gb
UFDG is applicable to SG
FD/SOI MOSFETs, as well
as asymmetrical and
symmetrical DG MOSFETs
(including FinFETs).
Wg
Lg
J. G. Fossum / 12
Quantization Effects Modeling in UFDG
UFDG is actually a Compact Poisson-Schrödinger Solver:
Classical PE
Eigenfunction Ψ0 (104 m-1/2)
(charge coupling,
inversion-charge
distribution)
potentials,
electric fields
(classical Qi & Ich)
Model
SCHRED*
2.0
0.6V
SWE
(eigenfunctions,
eigenvalues,
2D DOS, F-D)
in UTB/channel
QM Qi & Ich
1D SWE analytical solution
is derived using a variational
approach, then coupled to
PE and Qi(VGfS, VGbS) via
Newton-Raphson iteration,
all with dependence on tSi
as well as Ex.
tSi = 5nm
1.0V
1.5
VGS = 1.5V
SDG nMOSFETs:
n+ poly gates
tSi = 20nm tox=1.5nm
NB=1017cm-3
1.0
0.5
1.5V
0.0
updated potentials,
electric fields
0.0
0.2
0.4
0.6
0.8
Normalized Position x/tSi
1.0
The QM modeling is also the
basis for a physical mobility
model for the UTB carrier
transport, which is dependent
on tSi as well as Ex.
*1D numerical PE-SWE solver [D. Vasileska and Z. Ren, Purdue Univ., W. Lafayette, IN, Feb. 2000].
J. G. Fossum / 13
QM Modeling (e.g., for nMOSFET)
• Trial Eigenfunction for Asymmetrical (Generic) DG Device:
– b j x ⁄ t Si
– b j ( t Si – x ) ⁄ t Si
aj
( j + 1 )πx 
2


ψ j ( x ) = ------ ------- sin ------------------------ e
+ ηe




t Si
2 t
Si
, j = 0, 1, 2, ... ;
aj are normalization constants, and η is a charge-partition parameter.
• Solve Poisson equation for the electric potential φ(x) in the Si-film:
q
q
d2
---------- φ ( x ) = -------- ( N A + n ( x ) ) = -------- ( N A + N inv ψ ( x ) 2 )
ε Si
ε Si
d x2
⇒
φ( x)
.
• Use Schrödinger equation to get subband energies (eigenfunctions):
h2
d2
– ------------------ ---------- ψ j ( x ) + – q φ ( x )ψ j ( x ) = E j ψ j ( x )
8π 2 m d x 2
⇒
E j( b j)
.
x
• Apply QM variational approach (with Qi = -qNinv):
dE j
---------- = 0
db j
⇒
5 
 qm π 2  Q
+
x  d ( eff ) --6- Q i 

b j ≅ t Si  -------------------------------------------------------------


( j + 1 )ε Si h 2


1⁄3
, j = 0, 1, 2, ...
J. G. Fossum / 14
Energy Quantization ⇒ Carrier Distribution
SDG nMOSFET Energy-Band Diagram
E1’
Front Gate
Back Gate
Ec
E0’
E1
EF
E0
EF
Ei
qVGS
φs
Ev
qVGS
φ(x)
EFG
EFG
Si-Film Channel
0
tSi
x
The quantization (carrier confinement and formation of 2D energy subbands Ej) is
dependent on the Si-film thickness (tSi) as well as the transverse electric field (EX).
J. G. Fossum / 15
QM Model Implementation in UFDG (to get Qi)
Weak Inversion: φsf,b = φsf,b(CL) - ∆φ(QM)[E0(VGfS, VGbS)].
• Diffusion current follows from integration along channel (0 < y < Le).
• 2D Poisson solution defines SCEs and effective channel length (Le).
Strong Inversion: Inversion charge via Newton-Raphson (and straight) Iteration(s):
4πqk B T 
n i2

 qφ sf – E j 
– Q i = ----------------------  gm d ∑ ln  1 + ----------------- exp  ------------------------- 
NcN A
 kBT 
h2 
j 
f –φ )
qφ sf – E ′j   
n i2
C oxf ( V GfS – V FB


sf
+ g ′ m d′ ∑ ln  1 + ----------------- exp  -------------------------   = ------------------------------------------------------------------NcN A
γ
 kBT  
j 
j = 0, 1 .
• Uncertainty in the effective mass mx (mx’) and the 2-D density-of-states effective
mass md (md’) suggests two tuning parameters, QMX and QMD, which are
generally unity: mx = mx/QMX and md = md/QMD.
• QMX is also used as a flag: QMX = 0 gives classical solution (PE only).
• Drift/diffusion current follows from integration along channel (0 < y < Le).
• 2D Gauss solution near drain defines channel-length modulation (Leff - Le).
Moderate Inversion: VTW and VTS are increased via ∆φ(QM)(E0).
J. G. Fossum / 16
UFDG: QM vs. Classical Solutions
•Electrical Properties (SDG nMOSFETs)
UFDG
1.2
SCHRED
toxf = toxb = 3nm
t = 10nm
0.8 Si
NA = 1015 cm-3
ΦG ~ mid-gap
2.4
Classical
1.8
Classical
UFDG
SCHRED
1.2
QM
0.4
0.0
0.0
Intrinsic Gate Capacitance
CG (mF/cm2)
-Qi/q (x1013 cm-2)
Integrated Inversion Charge Density
0.6
0.3
0.6
0.9
VGfS = VGbS (V)
1.2
0.0
-0.3 0.0
QM
toxf = toxb = 3nm
tSi = 10nm
NA = 1015 cm-3
VDS = 0.0 V
0.3 0.6 0.9 1.2 1.5
VGfS = VGbS (V)
• UFDG has classical option; QM doubles run-time.
J. G. Fossum / 17
Course Application of UFDG: Nanoscale SDG FinFET
(Scaling and Design Issues)
LeD
LeS
Gate
NB = 0
y
x
tSi
n+
Source
hSi
n+
Drain
Lg
With undoped body, (effectively) undoped fin-extension lengths (LeS, LeD) can be
defined by the S/D lateral doping profiles and the positioning of the gate on the fin.
J. G. Fossum / 18
UFDG (Partial) Calibrations to Nanoscale SDG nFinFET*
Lg = 17.5nm, Wg = hSi = 50nm, NB = 0, tox = 1.7nm, n+ poly gate
10-4
10-5
Leff=29.5nm
IDS (A)
10-6
10-7
10-8
Leff=44.0nm
10-9
VDS=0.1V measured data
VDS=1.2V measured data
10-10
10-11
UFDG: tSi=17nm, RD=100Ω-µm, RS=550Ω-µm;
µn0 ~ 300cm2/V-s
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS (V)
UFDG: Leff is bias-dependent, with G-S/D underlap;
S/D resistances are unequal, non-ohmic; new modeling is needed.
*Fabricated at AMD.
J. G. Fossum / 19
2D Numerical Device Simulations
SDG nFinFET: NB = 0, Lg = 105nm, LeS = LeD = 25nm, tSi = 26nm; Vt ~ 0V
φs(y), x = 0, tSi
ns(y), x = 0, tSi
1020
Potential (V)
1018
-0.1V
0.4
1017
1016
0.3
S
D
VGS=-0.3V
1015
1014
0.2
1013
0.1
Lg
LeS
LeD
1012
1020
1.2V
1019
1018
1019
0.0V
-0.1V
1017
1018
1017
1016
1015
1014
1016
S
D
VGS=-0.3V
1014
1013
1013
1012
1011
1015
Lg
LeS
LeD
1012
1011
1010
Doping Concentration (cm-3)
0.0V
0.5
Doping Concentration (cm-3)
1019
1020
Electron Density (cm-3)
1.2V
0.6
11
0.0
0.05
10
0.08
0.11
0.14
y (µm)
0.17
0.20
0.23
109
0.05
VDS = 0.1V
0.08
0.11
0.14
0.17
0.20
0.23
1010
y (µm)
The gate voltage modulates φ and n in the undoped fin-extension regions,
especially for weak inversion, confirming a bias-dependent effective channel length.
J. G. Fossum / 20
More Course Content: TG MOSFET Issues
Lg
1) Corner Effects:
Drain
hSi
Si
Corner regions of body can
affect subthreshold characteristics.
Gate
wSi
Source
A
A’
2) Short-Channel Effects:
Fin width or height must be
ultra-narrow.
A - A' Cross-Section
Gate
3) Layout Efficiency:
z
Corner Regions
x
Si
Gate Oxide
Effective gate width
is too narrow.
SiO2
Substrate
J. G. Fossum / 21
TG Short-Channel Effects
3D DAVINCI*: TG nMOSFET Fin Size for SCE Control
(Leff = 28nm, low NB, tox = 1.1nm)
2.0
S = 80mV
DIBL = 100mV/V
hSi/Leff
1.5
1.0
hSi = wSi = Leff
hSi = Leff
wSi = 1.4wSi(DG), hSi = 1.4hSi(FD)
1/5 ~ hSi(FD)/Leff
0.5
wSi = Leff
Design
Space
0.0
0.0
0.5
1.0
1.5
2.0
wSi/Leff
wSi(DG)/Leff ~ 1/2
Ultra-small wSi and/or hSi is needed, as in a DG FinFET or an FD/SOI FET!
*3D numerical device simulator (Ver. 2003.06) [Synopsys, Durham, NC].
J. G. Fossum / 22
Examples of Course Projects
* “Bias-Dependent Effective Channel Length of Nanoscale Ultra-ThinBody MOSFETs with Gate-Source/Drain Overlap”
* “Threshold-Voltage Tuning for Double-Gate MOSFETs”
* “Gate Tunneling Current in Nanoscale Double-Gate FinFETs”
* “Speed Enhancement of Nonclassical CMOS by Pragmatic Degradation
of Subthreshold Slope”
* “A Square-Law Mixer Using an Independent Double-Gate MOSFET”
* “High-Frequency, Low-Power Double-Gate CMOS Low-Noise
Amplifier”
* “Benchmarking DG vs. SG CMOS RF Circuits”
J. G. Fossum / 23
Summary
* Nanoelectronics / nonclassical CMOS
⇒ complex devices / physics.
* Teaching issues: EE-physics overlap;
inadequate student backgrounds,
curricula; loss of students.
* Novel nonclassical CMOS-device
course; UFDG is tool, glue.
* Course works, but really need a Shockley-like
guy [ref., Electrons and Holes in
Semiconductors, 1950] to develop
nanoelectronic device physics theory that can
be effectively taught to all CMOS engineers.
J. G. Fossum / 24