CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Concurrent systems’
hardware design using
Petri nets
EWME
2004
Luís Gomes
Anikó Costa
lugo@uninova.pt
akc@uninova.pt
&
LISBON - PORTUGAL
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Introduction - I
General goal:
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Co-design of embedded systems
EWME
2004
using reconfigurable platforms
Embedded system =
Reactive system +
Real-time constraints +
Data processing capabilities
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Introduction - II
Reference methodology: From user requirements
to implementation code and/or configuration
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Informal/semi-formal description UML Use Cases
EWME
2004
Specification & verification
Statecharts,
Petri nets
Partitioning
Code/configuration
Prototype
C/C++,
VHDL
Emphasis
for this
presentation
Programmable
Logic Devices
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Structure of the presentation
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
¾ Introduction
EWME
2004
¾ Modelling of concurrent systems using
Petri nets
¾ Hardware design & Petri nets within the
Electrical and Computer Engineering
Course at Univ. Nova de Lisboa
¾Presentation of one application example
¾ Conclusions
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Finite State Machines
based system modelling
State Diagrams and
State Diagrams with Data Paths (register transfer level)
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Foundations:
EWME
2004
Based on the modelling of global state and
transitions among global states.
Robustness:
Intuitiveness; good for modelling,
for implementation specification (executable model)
and for documentation.
Weakness:
Lack of support for concurrent systems (state space
explosion phenomenon);
Lack of hierarchical structuring mechanisms, and
folding techniques
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Petri nets - I
Can be seen as a generalization of state machines:
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
several states can be active simultaneously,
transitions can start at a set of active “states” and
end in another set of “states”.
EWME
2004
Bipartite graphs based on two types of nodes:
places or conditions (static part of the model), and
transitions or events (dynamic part of the model).
Locality
Evolution based on local evaluation of transitions
Concurrency
Concurrent evolution of independent transitions
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Petri nets - II
Capability to model several situations:
Synchronization, mutual exclusion, test, fork, conflicts...
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Places represent local states (states or resources)
EWME
2004
Transitions can model synchronization, fork and
join between parallel processes
t1
t2
t1
t2
t1
p1
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
ÆM3
ÆDIR3
A3
ÆM2
ÆDIR2
B3
A2
ÆM1
ÆDIR1
B2
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
A1
EWME
2004
GO
Petri nets – III
Modelling example
State
diagram
S11
M1=1
DIR1=right
GO
S01
M1=0
A1
B1
BACK
S31
M1=1
DIR1=left
GO
GO
S21
M1=0
BACK
BACK
BACK
3
3
3
Place-transition
Petri nets
Elementary
Petri nets
B1
<1>
<2>
<3>
Coloured
Petri netsBACK
GO
<i>+<j>+<k> <i>+<j>+<k>
<i>
<i>
3
<i>
<i>
<i>+<j>+<k>
<i>+<j>+<k>
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Petri nets - IV
Petri nets can be formally defined and
represented through a set of equations
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
PN = (P, T, I, O, M0)
EWME
2004
Mi = M0 + W . f(σ)
Supporting propriety verification, like invariants,
deadlocks, liveness, reversibility, boundedness, ...
Petri nets = Graphical expresiveness,
... complemented by formal
verification capabilities
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Structure of the presentation
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
¾ Introduction
EWME
2004
¾ Modelling of concurrent systems using
Petri nets
¾ Hardware design & Petri nets within the
Electrical and Computer Engineering
Course at Univ. Nova de Lisboa
¾Presentation of one application example
¾ Conclusions
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Hardware design & Petri nets
Hardware design models need
Model composability
√
√
Formal verification to cope with
increasing system complexity
√
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Modularity / Reusability
EWME
2004
Concurrent sub-systems modelling
Hierarchical structuring mechanisms
Scalability
Operational modelling
√
√
√
√
Petri nets modelling supports
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
From models to prototype
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Specific path explored within
“Digital Systems Design” discipline
at Electrical & Computer Engineering Course
and at Informatics Engineering Course
Petri net
model
Propriety
verification
Specification
EWME
2004
VHDL
CPLDs &
FPGAs
Implementation
specification
Prototype
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Presentation of the discipline
The course:
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
5-year degree on Electrical and Computer Engeneering
The “Digital Systems Design” discipline :
Located at the 7th semester (4th year)
Emphasis of Previous disciplines in Digital Systems:
Theory:
System decomposition into control
and data parts;
Microprocessor architectures.
Technology:
EWME
2004
Introductory digital systems;
From MSI ICs to CPLDs
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Some goals for
“Digital Systems Design”
Theoretical:
Specification formalisms for concurrent systems:
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
Statecharts
EWME
2004
Petri nets
Implementation:
Modularity and reusability of models
Usage of Hardware Description Languages (VHDL)
Technologies:
Usage of PLDs – Programmable Logic Devices
(CPLDs and FPGAs)
Specific to some application areas (card reader,
barcode reader, for instance).
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Structure of the presentation
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
¾ Introduction
EWME
2004
¾ Modelling of concurrent systems using
Petri nets
¾ Hardware design & Petri nets within the
Electrical and Computer Engineering
Course at Univ. Nova de Lisboa
¾Presentation of one application example
¾ Conclusions
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Proposed projects
Several families of mini-projects are proposed:
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
-Having concurrent activity of several entities in the system
EWME
2004
-Easy to “tune” to be slightly different for several groups
year after year (each group will have a unique project set
of requirements)
Common steps to all mini-projects:
- modelling through Petri nets or Statecharts
- coding in VHDL
- implementation using Digilent didactic boards,
with two Xilinx PLDs (one Spartan-II FPGA
and one 95108 CPLD)
Most popular mini-project:
- parking lot controller
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
1-in 1-out parking lot - I
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
gotTicket
arrive
gateInOpen
EWME
2004
Controller
exit
pay
gateOutOpen
ParkingZone
Entrance
Exit
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
1-in 1-out parking lot - I
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
gotTicket
arrive
gateInOpen
Controller
Exit
ParkingZone
Entrance
Entrance
arrive+
waitingTicket
entranceFree
arrive-
ParkingZone
carsInsideZone
waitingToPay
exit+
gateOpen
enter
leave
freePlaces
Exit
exitFree
pay
gotTicket
EWME
2004
exit
pay
gateOutOpen
gateOpen
exit-
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
1-in 1-out parking lot - II
ParkA
ParkingZone
Entrance
arrive+ waitingTicket
exitFree
entranceFree
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
in
arrive+
waitingTicket
entranceFree
arrive-
gateOpen exit-
freePlaces
ParkingZone
carsInsideZone
waitingToPay
exit+
gateOpen
enter
leave
freePlaces
Exit
exitFree
pay
gotTicket
EWME
2004
out
arrive- gateOpen
Entrance
Exit
waitingToPay exit+
carsInsideZone
gateOpen
exit-
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
1-in 1-out parking lot - II
ParkA
arrive+ waitingTicket
waitingToPay exit+
carsInsideZone
exitFree
entranceFree
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
in
arrive- gateOpen
gateOpen exit-
freePlaces
ParkA = Entrance + ParkingZone + Exit
Entrance
arrive+
waitingTicket
entranceFree
arrive-
ParkingZone
carsInsideZone
waitingToPay
exit+
gateOpen
enter
leave
freePlaces
Exit
exitFree
pay
gotTicket
EWME
2004
out
gateOpen
exit-
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
The car parking
lot controller
EWME
2004
The car parking lot controller proved to be a
very flexible application example that can
be easily reconfigured keeping complexity
at similar levels.
Easy to change requirements at different
aspects and levels, namely:
- layout of the parking lot
- robusteness of the model
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Changing the layout - I
IN 1
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
OUT 1
EWME
2004
IN 2
PARKING
444
OUT 2
3-in
2-out
1-floor
car parking lot
IN 3
Ground floor
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Changing the layout - II
2nd floor
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
1st floor
EWME
2004
Ground floor
Addition of different
parking areas (or floors) is
accomplished as the
additive composition of
specific sub-models:
- entrance module;
- exit module;
- parking zone counter;
- passage between
areas.
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Robustness of the model
Free
places
2nd floor
444
Free
places
2nd floor
444
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
A B
B
1st floor
B
A
B
1st floor
A
A
A
Different models can be considered for the
passage between two floors/areas :
- normal flow of one car between the two floors;
- using reverse gear at the middle of the passage;
- using the passage in the reverse way;
EWME
2004
- considering more than one car at the passage...
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
E3Park2Exit2
E2Park
Entrance[1]
arrive+
waitingTicket
ParkingZone
enter
entranceFree
arrive-
April 15 & 16th, EPFL - Lausanne Switzerland
5th European Workshop on
Microelectronics Education - 2004
exitFree
out
freePlaces
exit-
arrive-
ParkAPassage2
gateOpen
gateOpen
first-
second+
p1
first+
p2
second+
second-
Passage[1]
ParkExit
second-
Entrance[1]
ParkingZone
Exit
first+
p3
first-
first+
p3
second-
p2
first-
p1
first-
second+
Passage[2]
second-
second+
Entrance[2]
first+
ParkA
ParkAPassage2
Passage[1]
Passage[2]
Entrance
ParkA
Entrance
EWME
2004
exit+
enter
entranceFree
(simplified models)
E2Park
waitingToPay
gateOpen
Entrance[2]
arrive+ waitingTicket
Hierarchical versus
flat representations
E3Park2
Exit
carsInsideZone
arrive+
ParkingZone
Exit
Exit
entranceFree
arrive-
waitingToPay
waitingTicket
gateOpen
in
freePlaces
carsInsideZone
ParkingZone
out
exit-
exit+
exitFree
gateOpen
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Structure of the presentation
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
¾ Introduction
EWME
2004
¾ Modelling of concurrent systems using
Petri nets
¾ Hardware design & Petri nets within the
Electrical and Computer Engineering
Course at Univ. Nova de Lisboa
¾Presentation of one application example
¾ Conclusions
CONCURRENT SYSTEMS’ HARDWARE DESIGN USING PETRI NETS
Conclusions
Most of the students enjoyed the proposed project.
• from specification to a prototype
of a concurrent system
using Petri nets and
Programmable Logic Devices.
5th European Workshop on
Microelectronics Education - 2004
April 15 & 16th, EPFL - Lausanne Switzerland
It proved to be a good project to reach the initial goals:
Several key concepts were exercised, from theoretical
to implementation issues: concurrency modelling,
model composability, reusability, hardware description
languages, reconfigurable devices, ...
EWME
2004
Several students expanded the initial specification at
their own expenses (extra hours work).