Enhancements
To
The
Digital Transverse
_
_
_
jtj
Dampers At The Brookhaven AGS
M. Wilinski, A. Drees, R. Michnoff, T. Roser, G.A. Smith
Brookhaven National Laboratory
Upton, NY 11973
Abstract. Since 1993, a digital transverse damper system has been used at the Brookhaven
Alternating Gradient Synchrotron (AGS). The dampers are used to damp coherent oscillations
and injection errors in both planes for protons and all species of Heavy Ions. Over nine years,
several AGS improvements, the addition of the Relativistic Heavy Ion Collider (RHIC)
operations, and our experience, created a critical need to improve the original system. Several
enhancements have been made to the digital electronics including compatibility with harmonic
numbers up to 24, an increase in the system resolution from eight to ten bits, and the conversion
of the system interface to VME. The analog electronics were also modified to appropriately
interface with the new digital electronics, as well as to provide an overall functional
improvement.
The pick-up electrode (PUE) preamplifiers were redesigned to decrease the
radiation susceptibility of the electronics. The concepts of the AGS Damper system can be
utilized in developing a solution for the damping requirements in RHIC.
INTRODUCTION
The AGS Transverse Damper system was commissioned in 1993 to damp coherent
oscillations and injection errors. It consists of beam position pickups, preamplifiers
for the horizontal and vertical planes, signal processing electronics, and stripline
kickers1'2. A simplified block diagram of one plane is shown in Figure 1.
The capacitive pickup electrodes (PUE) located at F20 in the AGS Ring are used to
measure the beam position. A four-channel preamplifier conditions the signals before
they are sent to the processing electronics located outside the AGS Ring in the F18
House. Hybrid transformers generate horizontal difference, vertical difference, and
sum from the four PUE signals. The Buffer Gain Module provides a continuously
adjustable gain of 0 to 40dB for each signal independently. Each signal is baseline
restored and integrated over one clock cycle. The integrated signals are then digitized
by ADCs. Each beam bunch centroid is calculated in a digital processor. Using an
established algorithm,3' 4 a correction kick is determined and clocked into DACs.
With the use of 500W Kalmus power amplifiers, the correction signal is sent to 50Q
stripline kickers in the AGS Ring to damp beam oscillations and instabilities.
The clock signals for the integrators, ADCs, and DACs are generated from RF sine
and cosine signals. They are phased-locked to the frequency sweep of the low level
RF used in the AGS. The RF signals are input into two Phase Shifter modules that
* Work performed under auspices of the U.S. Department of Energy
CP648, Beam Instrumentation Workshop 2002: Tenth Workshop, edited by G. A. Smith and T. Russo
© 2002 American Institute of Physics 0-7354-0103-9/02/$19.00
289
TYPICAL OF BOTH PLANES
u, NORMALIZER
J'
A/£
—»
CLOSED ORBrr
suPPRESSION (C OS)rFORMALIZED A AVERAGE OR BIT
PIPELINE
DELAY
FIFO
CLOCK
t__
-^
AVERAGI: ORBIT =
(PREVIO US TURN
COS SUM
VA1 UE)
PREVIOUS
TURN COS
SUM LATCH
CLOCK
BEAM
SYNCHRONOUS
RF SIGNALS
Figure 1. Block Diagram of the Digital Transverse Damper System.
1
COS SUM =
COS VALUE +
(PREVIOUS
TURN COS
SUM)
produce a total of four independent phase-shifted TTL outputs. The signals are sent to
a Phase Shifter Buffer Module that has two functions: (1) it operates as a buffer and,
(2) it introduces a time delay on three of the four channels. The delay compensates for
the amount of time it takes for the PUE signals to arrive at the F18 House, as it is
necessary to keep the clock signals and beam signals in phase relative to each other
over the entire RF frequency sweep. The buffered signals are then distributed to the
appropriate device.
Changes and improvements made within the Brookhaven accelerator complex
imposed a need for an upgrade to the damper system. The maximum harmonic
number for the AGS was raised from 12 to 24. Also, the harmonic number selection
range was expanded. Previously, only harmonic numbers 8 and 12 could be selected.
The upgrade allows harmonic numbers in the range of 1 to 24.
The addition of RHIC operations also served as motivation for an upgrade. An
injection damping system is currently planned for RHIC5 for which the AGS dampers
are a strong foundation. As the amount of time available for processing in RHIC is
decreased, an effort was made to increase the processing speed of the AGS dampers
for use as a prototype.
There were also several approaches on how to improve the system including
increasing the flexibility of the programmed algorithms, increasing the system
resolution to ten bits, and providing digital control to the Phase Shifters. The increase
in system resolution had an immense impact on the digital portion of the electronics,
as it required the processing gate array to be completely redesigned. Therefore, an
upgrade was done to make the AGS damper system compatible with the new
operational requirements.
DIGITAL SYSTEM UPGRADE
Prior to the upgrade, a BNL Instrument Controller controlled the processing
electronics. This interface was outdated and contained several limitations, thereby
providing the impetus for conversion to a VME based controller. The VME chassis
contains a Front End Computer (FEC) with an ethernet interface to the BNL network,
allowing the status to be monitored. In the conversion, the diagnostic memory, which
had the capacity to store up to 16,000 turns of data, was removed.
A BNL custom designed VME module, the VI27 AGS Damper module, was
developed to perform the beam damping algorithm and to produce an analog output
signal to the power amplifiers. One module is installed for each of the two planes.
Two Edge Technology, Inc. 700140 ten bit, 20 MHz ADCs are used to digitize the
integrated sum and difference input signals provided by the analog processing
electronics. The mathematical calculations for the algorithm, as shown in Figure 1,
are performed in an Altera EPF10K200 gate array using pure combinatorial logic. As
soon as the digitized ADC data becomes available, the calculations begin and
propagate to the Pipeline Delay FIFO and the Previous Turn Closed Orbit Suppression
(COS) Sum latch. An Edge Technology, Inc. 700145 ten bit, 20 MHz DAC is used to
generate the plus and minus outputs to the Kalmus power amplifiers. The minus
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output is always of the same magnitude but opposite polarity of the plus output, thus
doubling the kick strength by providing a push-pull effect on the beam.
The damping algorithm calculates a linear output function that is proportional to the
difference between the measured single turn beam position and the calculated average
orbit. This calculation is performed independently for each bunch, where the
harmonic number defines the number of bunches. The Output Function to the power
amplifiers is selected to be one of the following types: Linear Function Direct, Linear
Function with Programmable Multiplier, Bang-bang, and Bang-bang with
Programmable Deadband. The two programmable methods allow the output signal to
change with greater flexibility.
The major system programmable parameters are shown in Table 1. Additional
parameters, not shown in the table, allow the Output Function to change at a
programmable delay time from the beginning of the AGS cycle.
TABLE 1. Programmable System Parameters_____________________________
Parameter_______________________________Description__________
Harmonic Number
Number of RF clocks per revolution; maximum
number of bunches in AGS Ring
COS Divide Value
Used by COS algorithm to control orbit
correction response relative to average orbit;
number of revolutions used to calculate average
orbit
Sum Cutoff
Output is zero if sum signal is below this value;
inhibits output if beam signal is not detected
Output Function Select
Select one of four algorithm types
Output Delay
Delays output value by programmable number of
RF clocks for proper bunch synchronization
Preamplifier Gain
Select one of three gain settings
Sum Gain, Difference Gain
Select gain amount between 0 and 40dB
RF Clock Phase Shifter
Select a value between 0 and 360 degrees for
_______________________________critical timing control of the clock signals_____
ANALOG SYSTEM UPGRADE
To appropriately interface with the improved digital electronics, several of the
analog electronics modules were modified. The ADCs were moved out of the analog
processor crate and incorporated into the V127 module located in the VME chassis.
The remaining analog modules were consolidated into one 19-inch, 6U Eurocard crate,
requiring some modules to be repackaged from NIM modules. Several existing
modules also had their inputs and outputs transferred from the rear panel to the front
panel to accommodate the new analog-digital interconnections.
Also, the two
integrator modules had signal outputs added to view the integrated sum and difference
signals without disturbing the signals used for processing.
Concurrent to the interface alterations, modifications were also made to the analog
electronics to provide overall functional improvement. Digital phase control for the
RF Phase Shifter module was implemented. Four digital phase controls are sent to the
phase shifter by a VME based Front End Computer (FEC) with user control through
Spreadsheet, a BNL developed, UNIX based software program. A decimal setpoint
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value between 0 and 255 is entered into Spreadsheet with an eight bit binary word
corresponding to the setpoint sent to the appropriate channel. The conversion factor
is l°/least significant bit. If necessary, the module can be returned to analog phase
control by changing a jumper internal to the module.
The digital control for the Buffer Gain Control Module was also changed.
Previously, the module had one input of eight bits that was multiplexed among the
horizontal difference, vertical difference, and sum signal gain controls. The module
was redesigned to have three eight-bit inputs with each signal receiving its own gain
control. The Spreadsheet program is used to control the gain by entering a setpoint
value between 0, corresponding to a gain of OdB, and 255, corresponding to a gain of
40dB. The gain conversion is linear between 0 and 40dB.
The final module that underwent a major upgrade was the Phase Shifter Buffer
module. Formerly, the module had eight phase inputs and outputs. However, since
only four outputs are produced by the Phase Shifters, eight channels were superfluous.
The module was reconfigured with four single-ended phase inputs (Phase A, B, C, &
D) and five differential outputs (Phase A, B, B, C, & C). The fourth input channel,
Phase D, does not have a corresponding output on the front panel. The Phase A output
is sent to an intermediary timing module and then used to clock the two integrator
modules. The two Phase B outputs clock the horizontal and vertical ADCs, and the
two Phase C outputs clock the horizontal and vertical DACs. The Phase A, B, and D
channels contain an internal time delay of 200ns.
PREAMPLIFIER REDESIGN
The PUE preamplifiers were redesigned to reduce the damaging effects of radiation
and to increase the amount of RF shielding. Previously, the preamplifier's power
supplies were attached to its enclosure in the AGS Ring. Radiation damage to the
power supplies was a major source of failure. However, the preamplifier cannot be
moved from its location since the capacitive PUEs need a high impedance input. After
consideration, the power supplies were moved outside of the AGS Ring into the F18
House, while keeping the preamplifier in its current location.
New inner and outer preamplifier enclosures with improved EMI shielding were
purchased. The inner enclosure, which directly encloses the preamplifier circuit
board, has shielding capabilities at or greater than 80dB up to 20GHz. This inner
enclosure is placed inside an outer junction box that has shielding greater than 35dB
up to IGHz. To provide better shielding at the signal connection points, metal circular
connectors for the gain control signals and power were used instead of plastic
connectors. SMA connectors were used at the signal input and output connections
instead of BNC connectors.
The circuit boards were also redesigned to take advantage of surface mount
technology. The design is based on the preamplifiers that were developed for the AGS
Booster6. By using surface mount chips, the four preamp channels were placed on one
circuit board. The preamp has remotely selectable gains of one-fifth, one, and ten.
Gain changing is accomplished through the use of relays by either introducing a
293
voltage divider in a feedback loop for xlO gain or by loading the input signal with
capacitance for xO.2 gain.
RESULTS
The upgraded digital and analog electronics have been installed and in use since
February 2001 and performing as expected. There have been no major problems with
setup or functioning of the upgraded portions. The enhanced computer control made
the setup of the system faster and easier.
Some experimental data was taken to demonstrate the functioning of the dampers
with the improved electronics. With the dampers off, a kick was delivered to the beam
by the AGS Tune Meter Kicker, as shown in Trace B of Figure 2. Trace A on Figure
2 shows one bunch from the vertical-bottom PUE. As can be seen on the lower
portion of Trace A, the kick has caused the beam to oscillate. Figure 3 shows the
same two signals with the dampers turned on. The oscillations are damped out after
approximately 150us. Figure 4 depicts a close-up version of the same two signals, as
well as the Stripline Kicker signal on Trace C. The stripline kicker is kicking the
beam in the appropriate direction to move it back toward the central orbit.
HI———
59 ps
200 nV
Bunch signal
Figure 2. Bunch signal and Tune Meter Kicker signal with no damping.
Originally, the smallest gain of the preamplifier was intended to be one-tenth.
During testing, the signal output exhibited large overshoots and undershoots on the
rising and falling edges as a result of reduced bandwidth, as shown in Figure 5a. The
input signal is on Channel 1 and the output of the preamp at the lowest gain is on
Channel 2. Reducing the value of the input signal capacitive load from 2200pF to
680pF resulted in a cleaner signal as shown in Figure 5b. The input signal is on
Channel 1 and the output of the preamp at the lowest gain is on Channel 2. The change
in capacitor value does not affect the other gain ranges, as the capacitive load is only
introduced in the lowest gain range.
294
58 ps
280 iW
Bunch signal
Figure 3. Bunch signal and Tune Meter Kicker signal with damping.
20 ps
200 nV
Bunch signal
Figure 4. Bunch signal, Tune Meter Kicker signal, and Stripline Kicker signal with damping.
Since preliminary tests of the preamplifier were successful, one was installed at the
G7 location in the AGS Ring for tests with beam during the most recent high intensity
proton run. The remote power supplies were the only portions of the system not in
use. The signals returned from the preamp were examined and were comparable to
signals from the previous preamplifier. Therefore, the installation of the system at
F20, as well as the implementation of the remote power supplies at G7, will be done
over the upcoming shutdown period.
295
CH1
CH2
EOnU
100ns
Preamp
output
CH1
CH2
20nU
100ns
Preamp
output
FIGURE 5. (a) Preamplifier output with C=2200pF and xO.l gain, (b) Preamplifier output with
C=680pF and xO.2 gain.
REFERENCES
G.A. Smith, T. Roser, R. Witkover, V. Wong, Transverse Beam Dampers for the Brookhaven AGS, AIP
Conference Proceedings 319, Beam Instrumentation Workshop, Santa Fe, NM 1993, pp 309-318, BNL49437.
G.A. Smith, V. Castillo, T. Roser, W. Van Asselt, R. Witkover, V. Wong, Digital Transverse Beam
Dampers for the Brookhaven AGS, Proceedings of the 1995 Particle Accelerator Conference, Dallas, TX,
pp 2678-2680, BNL-61021.
T. Roser, Transverse Damping Algorithms, Accelerator Division Technical Note, AGS/AD/Tech. Note
No. 377.
T. Roser, Recursive Transverse Damping Algorithms, Accelerator Division Technical Note,
AGS/AD/Tech. Note No. 398.
A. Drees, M. Brennan, P. Cameron, C. Montag, R. Michnoff, G.A. Smith, M. Wilinski, RHIC Transverse
Damper, Beam Instrumentation Workshop, Upton, NY 2002.
DJ. Ciardullo, G.A. Smith, E.R. Beadle, Design of the AGS Booster Beam Position Monitor Electronics,
Proceedings of the 1991 Particle Accelerator Conference, pp 1431-143 3.
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